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Espressif Systems /ESP32-P4 /SOC_ETM /EVT_ST5

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Interpret as EVT_ST5

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ULP_EVT_ERR_INTR_ST)ULP_EVT_ERR_INTR_ST 0 (ULP_EVT_HALT_ST)ULP_EVT_HALT_ST 0 (ULP_EVT_START_INTR_ST)ULP_EVT_START_INTR_ST 0 (RTC_EVT_TICK_ST)RTC_EVT_TICK_ST 0 (RTC_EVT_OVF_ST)RTC_EVT_OVF_ST 0 (RTC_EVT_CMP_ST)RTC_EVT_CMP_ST 0 (PDMA_AHB_EVT_IN_DONE_CH0_ST)PDMA_AHB_EVT_IN_DONE_CH0_ST 0 (PDMA_AHB_EVT_IN_DONE_CH1_ST)PDMA_AHB_EVT_IN_DONE_CH1_ST 0 (PDMA_AHB_EVT_IN_DONE_CH2_ST)PDMA_AHB_EVT_IN_DONE_CH2_ST 0 (PDMA_AHB_EVT_IN_SUC_EOF_CH0_ST)PDMA_AHB_EVT_IN_SUC_EOF_CH0_ST 0 (PDMA_AHB_EVT_IN_SUC_EOF_CH1_ST)PDMA_AHB_EVT_IN_SUC_EOF_CH1_ST 0 (PDMA_AHB_EVT_IN_SUC_EOF_CH2_ST)PDMA_AHB_EVT_IN_SUC_EOF_CH2_ST 0 (PDMA_AHB_EVT_IN_FIFO_EMPTY_CH0_ST)PDMA_AHB_EVT_IN_FIFO_EMPTY_CH0_ST 0 (PDMA_AHB_EVT_IN_FIFO_EMPTY_CH1_ST)PDMA_AHB_EVT_IN_FIFO_EMPTY_CH1_ST 0 (PDMA_AHB_EVT_IN_FIFO_EMPTY_CH2_ST)PDMA_AHB_EVT_IN_FIFO_EMPTY_CH2_ST 0 (PDMA_AHB_EVT_IN_FIFO_FULL_CH0_ST)PDMA_AHB_EVT_IN_FIFO_FULL_CH0_ST 0 (PDMA_AHB_EVT_IN_FIFO_FULL_CH1_ST)PDMA_AHB_EVT_IN_FIFO_FULL_CH1_ST 0 (PDMA_AHB_EVT_IN_FIFO_FULL_CH2_ST)PDMA_AHB_EVT_IN_FIFO_FULL_CH2_ST 0 (PDMA_AHB_EVT_OUT_DONE_CH0_ST)PDMA_AHB_EVT_OUT_DONE_CH0_ST 0 (PDMA_AHB_EVT_OUT_DONE_CH1_ST)PDMA_AHB_EVT_OUT_DONE_CH1_ST 0 (PDMA_AHB_EVT_OUT_DONE_CH2_ST)PDMA_AHB_EVT_OUT_DONE_CH2_ST 0 (PDMA_AHB_EVT_OUT_EOF_CH0_ST)PDMA_AHB_EVT_OUT_EOF_CH0_ST 0 (PDMA_AHB_EVT_OUT_EOF_CH1_ST)PDMA_AHB_EVT_OUT_EOF_CH1_ST 0 (PDMA_AHB_EVT_OUT_EOF_CH2_ST)PDMA_AHB_EVT_OUT_EOF_CH2_ST 0 (PDMA_AHB_EVT_OUT_TOTAL_EOF_CH0_ST)PDMA_AHB_EVT_OUT_TOTAL_EOF_CH0_ST 0 (PDMA_AHB_EVT_OUT_TOTAL_EOF_CH1_ST)PDMA_AHB_EVT_OUT_TOTAL_EOF_CH1_ST 0 (PDMA_AHB_EVT_OUT_TOTAL_EOF_CH2_ST)PDMA_AHB_EVT_OUT_TOTAL_EOF_CH2_ST 0 (PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH0_ST)PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH0_ST 0 (PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH1_ST)PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH1_ST 0 (PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH2_ST)PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH2_ST 0 (PDMA_AHB_EVT_OUT_FIFO_FULL_CH0_ST)PDMA_AHB_EVT_OUT_FIFO_FULL_CH0_ST 0 (PDMA_AHB_EVT_OUT_FIFO_FULL_CH1_ST)PDMA_AHB_EVT_OUT_FIFO_FULL_CH1_ST

Description

Events trigger status register

Fields

ULP_EVT_ERR_INTR_ST

Represents ULP_evt_err_intr trigger status.\0: Not triggered\1: Triggered
ULP_EVT_HALT_ST

Represents ULP_evt_halt trigger status.\0: Not triggered\1: Triggered
ULP_EVT_START_INTR_ST

Represents ULP_evt_start_intr trigger status.\0: Not triggered\1: Triggered
RTC_EVT_TICK_ST

Represents RTC_evt_tick trigger status.\0: Not triggered\1: Triggered
RTC_EVT_OVF_ST

Represents RTC_evt_ovf trigger status.\0: Not triggered\1: Triggered
RTC_EVT_CMP_ST

Represents RTC_evt_cmp trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_DONE_CH0_ST

Represents PDMA_AHB_evt_in_done_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_DONE_CH1_ST

Represents PDMA_AHB_evt_in_done_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_DONE_CH2_ST

Represents PDMA_AHB_evt_in_done_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_SUC_EOF_CH0_ST

Represents PDMA_AHB_evt_in_suc_eof_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_SUC_EOF_CH1_ST

Represents PDMA_AHB_evt_in_suc_eof_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_SUC_EOF_CH2_ST

Represents PDMA_AHB_evt_in_suc_eof_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_FIFO_EMPTY_CH0_ST

Represents PDMA_AHB_evt_in_fifo_empty_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_FIFO_EMPTY_CH1_ST

Represents PDMA_AHB_evt_in_fifo_empty_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_FIFO_EMPTY_CH2_ST

Represents PDMA_AHB_evt_in_fifo_empty_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_FIFO_FULL_CH0_ST

Represents PDMA_AHB_evt_in_fifo_full_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_FIFO_FULL_CH1_ST

Represents PDMA_AHB_evt_in_fifo_full_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_IN_FIFO_FULL_CH2_ST

Represents PDMA_AHB_evt_in_fifo_full_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_DONE_CH0_ST

Represents PDMA_AHB_evt_out_done_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_DONE_CH1_ST

Represents PDMA_AHB_evt_out_done_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_DONE_CH2_ST

Represents PDMA_AHB_evt_out_done_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_EOF_CH0_ST

Represents PDMA_AHB_evt_out_eof_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_EOF_CH1_ST

Represents PDMA_AHB_evt_out_eof_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_EOF_CH2_ST

Represents PDMA_AHB_evt_out_eof_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_TOTAL_EOF_CH0_ST

Represents PDMA_AHB_evt_out_total_eof_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_TOTAL_EOF_CH1_ST

Represents PDMA_AHB_evt_out_total_eof_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_TOTAL_EOF_CH2_ST

Represents PDMA_AHB_evt_out_total_eof_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH0_ST

Represents PDMA_AHB_evt_out_fifo_empty_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH1_ST

Represents PDMA_AHB_evt_out_fifo_empty_ch1 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_FIFO_EMPTY_CH2_ST

Represents PDMA_AHB_evt_out_fifo_empty_ch2 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_FIFO_FULL_CH0_ST

Represents PDMA_AHB_evt_out_fifo_full_ch0 trigger status.\0: Not triggered\1: Triggered
PDMA_AHB_EVT_OUT_FIFO_FULL_CH1_ST

Represents PDMA_AHB_evt_out_fifo_full_ch1 trigger status.\0: Not triggered\1: Triggered

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Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data